770 search results - page 74 / 154 » Parallel simulation of chip-multiprocessor architectures |
124
Voted
ICPADS
1994
IEEE
1994
IEEE
Efficient Fault Tolerance: An Approach to Deal with Transient Faults in Multiprocessor Architectures
15 years 7 months ago
Dynamic error processing approaches are an important mechanism to increase the reliability in a multiprocessor system, while making efficient use of the available resources. To th...
132
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EUROPAR
2010
Springer
15 years 4 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
144
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MAGS
2007
15 years 3 months ago
2007
AKIRA is an open source framework designed for parallel, asynchronous and distributed computation, on the basis of some general architectural principles which are inspired by modu...
223
Voted
CCGRID
2005
IEEE
15 years 9 months ago
2005
IEEE
In order to allow every user to extract aggregated computational power from idle PCs in the Internet, we propose a distributed architecture to achieve a market based resource shar...
144
Voted
ITNG
2008
IEEE
15 years 10 months ago
2008
IEEE
This paper presents several parallel FFT algorithms with different degree of communication overhead for multiprocessors in Network-on-Chip(NoC) environment. Three different method...