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» Parallel simulation of chip-multiprocessor architectures
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117
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WCE
2007
15 years 4 months ago
Data Communication and Parallel Computing on Twisted Hypercubes
Massively parallel distributed-memory architectures are receiving increasing attention to meet the increasing demand on processing power. Many topologies have been proposed for int...
Emad Abuelrub
148
Voted
HPDC
2010
IEEE
15 years 4 months ago
A hybrid Markov chain model for workload on parallel computers
This paper proposes a comprehensive modeling architecture for workloads on parallel computers using Markov chains in combination with state dependent empirical distribution functi...
Anne Krampe, Joachim Lepping, Wiebke Sieben
123
Voted
NPC
2005
Springer
15 years 9 months ago
Performance Modelling and Optimization of Memory Access on Cellular Computer Architecture Cyclops64
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
Yanwei Niu, Ziang Hu, Kenneth E. Barner, Guang R. ...
CNHPCA
2009
Springer
15 years 10 months ago
Benchmarking Parallel I/O Performance for a Large Scale Scientific Application on the TeraGrid
This paper is a report on experiences in benchmarking I/O performance on leading computational facilities on the NSF TeraGrid network with a large scale scientific application. In...
Frank Löffler, Jian Tao, Gabrielle Allen, Eri...
143
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COMPSAC
2008
IEEE
15 years 10 months ago
Parallel Table Lookup for Next Generation Internet
The rapid growth of Internet population leads to the shortage of IP addresses. The next generation IP protocol, IPv6, which extends the IP address length from 32 bits to 128 bits,...
Li-Che Hung, Yaw-Chung Chen