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ICPP
2005
IEEE
14 years 4 months ago
Exploring Processor Design Options for Java-Based Middleware
Java-based middleware is a rapidly growing workload for high-end server processors, particularly Chip Multiprocessors (CMP). To help architects design future microprocessors to ru...
Martin Karlsson, Erik Hagersten, Kevin E. Moore, D...
ICPP
1995
IEEE
14 years 2 months ago
Progress: A Toolkit for Interactive Program Steering
Interactive program steering permits researchers to monitor and guide their applications during runtime. Interactive steering can help make end users more effective in addressing ...
Jeffrey S. Vetter, Karsten Schwan
IPPS
2005
IEEE
14 years 4 months ago
Desynchronized Pfair Scheduling on Multiprocessors
Pfair scheduling, currently the only known way of optimally scheduling recurrent real-time tasks on multiprocessors, imposes certain requirements that may limit its practical impl...
UmaMaheswari C. Devi, James H. Anderson
ISCA
1990
IEEE
186views Hardware» more  ISCA 1990»
14 years 2 months ago
Adaptive Software Cache Management for Distributed Shared Memory Architectures
An adaptive cache coherence mechanism exploits semantic information about the expected or observed access behavior of particular data objects. We contend that, in distributed shar...
John K. Bennett, John B. Carter, Willy Zwaenepoel
ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
14 years 2 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun