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ICS
1999
Tsinghua U.
14 years 1 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
SPAA
1996
ACM
14 years 1 months ago
From AAPC Algorithms to High Performance Permutation Routing and Sorting
Several recent papers have proposed or analyzed optimal algorithms to route all-to-all personalizedcommunication (AAPC) over communication networks such as meshes, hypercubes and ...
Thomas Stricker, Jonathan C. Hardwick
WOSP
2000
ACM
14 years 1 months ago
Expressing meaningful processing requirements among heterogeneous nodes in an active network
Active Network technology envisions deployment of virtual execution environments within network elements, such as switches and routers. As a result, nonhomogeneous processing can ...
Virginie Galtier, Kevin L. Mills, Yannick Carlinet...
HPDC
2008
IEEE
14 years 3 months ago
XenLoop: a transparent high performance inter-vm network loopback
Advances in virtualization technology have focused mainly on strengthening the isolation barrier between virtual machines (VMs) that are co-resident within a single physical machi...
Jian Wang, Kwame-Lante Wright, Kartik Gopalan
ICDCS
2002
IEEE
14 years 1 months ago
Query Optimization to Meet Performance Targets for Wide Area Applications
Recent technology advances have enabled mediated query processing with Internet accessible WebSources. A characteristic of WebSources is that their access costs exhibit transient ...
Vladimir Zadorozhny, Louiqa Raschid