1761 search results - page 289 / 353 » Parallel timing simulation on a distributed memory multiproc... |
ICS
2011
Tsinghua U.
13 years 10 days ago
2011
Tsinghua U.
The probability that a failure will occur before the end of the computation increases as the number of processors used in a high performance computing application increases. For l...
ISCA
1994
IEEE
14 years 1 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
AIIDE
2007
13 years 11 months ago
2007
This paper presents an application of Hierarchical Transition Network (HTN) planning to a squad-based military simulation. The hierarchical planner produces collaborative plans fo...
SPAA
2004
ACM
14 years 2 months ago
2004
ACM
Page migration is one of the fundamental subproblems in the framework of data management in networks. It occurs in a distributed network of processors sharing one indivisible memo...
IPPS
2009
IEEE
14 years 3 months ago
2009
IEEE
Emerging DNA sequencing technologies open up exciting new opportunities for genome sequencing by generating read data with a massive throughput. However, produced reads are signif...