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IPPS
2000
IEEE
13 years 12 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
PODC
1994
ACM
13 years 11 months ago
A Checkpoint Protocol for an Entry Consistent Shared Memory System
Workstation clusters are becoming an interesting alternative to dedicated multiprocessors. In this environment, the probability of a failure, during an application's executio...
Nuno Neves, Miguel Castro, Paulo Guedes
HPDC
2007
IEEE
14 years 1 months ago
Concepts and components of full-system simulation of distributed memory parallel computers
In this work we discuss a range of approaches to full-system simulation of distributed memory parallel computers, with emphasis on the interconnection network. We present our envi...
Francisco Javier Ridruejo Perez, José Migue...
IPPS
2009
IEEE
14 years 2 months ago
Using hardware transactional memory for data race detection
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
Shantanu Gupta, Florin Sultan, Srihari Cadambi, Fr...
PDP
2002
IEEE
14 years 15 days ago
A Fault-Tolerant Reservation-Based Strategy for Scheduling Aperiodic Tasks in Multiprocessor Systems
Periodic and aperiodic tasks co-exist in many realtime systems. The periodic tasks typically arise from sensor data or control loops, while the aperiodic tasks generally arise fro...
Chun-Hua Yang, Geert Deconinck