1761 search results - page 322 / 353 » Parallel timing simulation on a distributed memory multiproc... |
ICDCS
2010
IEEE
13 years 11 months ago
2010
IEEE
—We propose a steepest descent method to compute optimal control parameters for balancing between multiple performance objectives in stateless stochastic scheduling, wherein the ...
ICDCS
2011
IEEE
12 years 7 months ago
2011
IEEE
—Popular Internet services are hosted by multiple geographically distributed datacenters. The location of the datacenters has a direct impact on the services’ response times, c...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Inductive noise forces microprocessor designers to sacrifice performance in order to ensure correct and reliable operation of their designs. The possibility of wide fluctuations i...
CCGRID
2007
IEEE
14 years 1 months ago
2007
IEEE
Data replication is an excellent technique to move and cache data close to users. By replication, data access performance can be improved dramatically. One of the challenges in da...
EUROPAR
2001
Springer
14 years 3 days ago
2001
Springer
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...