1761 search results - page 55 / 353 » Parallel timing simulation on a distributed memory multiproc... |
IPPS
1997
IEEE
14 years 2 months ago
1997
IEEE
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...
IEEEPACT
2000
IEEE
14 years 2 months ago
2000
IEEE
Recent research suggests that DSM clusters can benefit from parallel coherence controllers. Parallel controllers require address partitioning and synchronization to avoid handlin...
ICS
1999
Tsinghua U.
14 years 2 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
SPAA
2003
ACM
14 years 3 months ago
2003
ACM
The general problem of verifying coherence for shared-memory multiprocessor executions is NP-Complete. Verifying memory consistency models is therefore NP-Hard, because memory con...
PARLE
1987
1987
Emulating Digital Logic using Transputer Networks (very High Parallelism = Simplicity = Performance)
14 years 1 months ago
Modern VLSI technology has changed the economic rules by which the balance between processing power, memory and communications is decided in computing systems. This will have a pr...