1761 search results - page 74 / 353 » Parallel timing simulation on a distributed memory multiproc... |
SBACPAD
2008
IEEE
14 years 5 months ago
2008
IEEE
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
CF
2006
ACM
14 years 2 months ago
2006
ACM
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...
ICPP
2003
IEEE
14 years 3 months ago
2003
IEEE
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
HPCA
1995
IEEE
14 years 2 months ago
1995
IEEE
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
IPPS
1998
IEEE
14 years 2 months ago
1998
IEEE
We are developing a compiler that translates ordinary MATLAB scripts into code suitable for compilation and execution on parallel computers supporting C and the MPI message-passin...