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ICPP
1990
IEEE
14 years 2 months ago
Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes
As multiprocessors are scaled beyond single bus systems, there is renewed interest in directory-based cache coherence schemes. These schemes rely on a directory to keep track of a...
Anoop Gupta, Wolf-Dietrich Weber, Todd C. Mowry
WSC
2008
14 years 1 months ago
Parallel simulation of the global epidemiology of Avian Influenza
SEARUMS is an Eco-modeling, bio-simulation, and analysis environment to study the global epidemiology of Avian Influenza. Originally developed in Java, SEARUMS enables comprehensi...
Dhananjai Madhava Rao, Alexander Chernyakhovsky
SIAMCOMP
2000
118views more  SIAMCOMP 2000»
13 years 10 months ago
Constructive, Deterministic Implementation of Shared Memory on Meshes
This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. A...
Andrea Pietracaprina, Geppino Pucci, Jop F. Sibeyn
PADS
2005
ACM
14 years 4 months ago
Optimistic Parallel Discrete Event Simulations of Physical Systems Using Reverse Computation
Efficient computer simulation of complex physical phenomena has long been challenging due to their multiphysics and multi-scale nature. In contrast to traditional time-stepped exe...
Yarong Tang, Kalyan S. Perumalla, Richard M. Fujim...
HPDC
2006
IEEE
14 years 4 months ago
Path Grammar Guided Trace Compression and Trace Approximation
Trace-driven simulation is an important technique used in the evaluation of computer architecture innovations. However using it for studying parallel computers and applications is...
Xiaofeng Gao, Allan Snavely, Larry Carter