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» Parallelising Symbolic State-Space Generators
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FATES
2004
Springer
13 years 11 months ago
Test Generation Based on Symbolic Specifications
Abstract. Classical state-oriented testing approaches are based on simple machine models such as Labelled Transition Systems (LTSs), in which data is represented by concrete values...
Lars Frantzen, Jan Tretmans, Tim A. C. Willemse
ESORICS
2003
Springer
14 years 18 days ago
An On-the-Fly Model-Checker for Security Protocol Analysis
We introduce the on-the-fly model-checker OFMC, a tool that combines two methods for analyzing security protocols. The first is the use of lazy data-types as a simple way of buil...
David A. Basin, Sebastian Mödersheim, Luca Vi...
CAV
1993
Springer
127views Hardware» more  CAV 1993»
13 years 11 months ago
Symbolic Equivalence Checking
Abstract. We describe the implementation, within ALDEBARAN of an algorithmic method allowing the generation of a minimal labeled transition rom an abstract model ; this minimality ...
Jean-Claude Fernandez, Alain Kerbrat, Laurent Moun...
TACAS
2005
Springer
88views Algorithms» more  TACAS 2005»
14 years 26 days ago
Shortest Counterexamples for Symbolic Model Checking of LTL with Past
Shorter counterexamples are typically easier to understand. The length of a counterexample, as reported by a model checker, depends on both the algorithm used for state space explo...
Viktor Schuppan, Armin Biere
EURODAC
1994
IEEE
110views VHDL» more  EURODAC 1994»
13 years 11 months ago
Symbolic exploration of large circuits with enhanced forward/backward traversals
Symbolic state space exploration techniques for Finite State Machines (FSMs) are a major recent result in CAD for VLSI. Most of them are exact and based on forward traversal, but ...
Gianpiero Cabodi, Paolo Camurati, Stefano Quer