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ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 4 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
DAC
2009
ACM
14 years 2 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
DIS
2009
Springer
14 years 2 months ago
A Dialectic Approach to Problem-Solving
We analyze the dynamics of problem-solving in a framework which captures two key features of that activity. The first feature is that problem-solving is a social game where a numb...
Éric Martin, Jean Sallantin
ERSHOV
2009
Springer
14 years 2 months ago
Towards a Scalable, Pragmatic Knowledge Representation Language for the Web
Abstract. A basic cornerstone of the Semantic Web are formal languages for describing resources in a clear and unambiguous way. Logical underpinnings facilitate automated reasoning...
Florian Fischer, Gulay Ünel, Barry Bishop, Di...
ISCA
2007
IEEE
103views Hardware» more  ISCA 2007»
14 years 1 months ago
Ginger: control independence using tag rewriting
The negative performance impact of branch mis-predictions can be reduced by exploiting control independence (CI). When a branch mis-predicts, the wrong-path instructions up to the...
Andrew D. Hilton, Amir Roth
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