1710 search results - page 249 / 342 » Parallelism in Structured Newton Computations |
ICPP
2008
IEEE
14 years 4 months ago
2008
IEEE
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
IPPS
1998
IEEE
14 years 2 months ago
1998
IEEE
With aggressive superscalar processors delivering diminishing returns, alternate designs that make good use of the increasing chip densities are actively being explored. One such ...
CF
2006
ACM
14 years 1 months ago
2006
ACM
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
HIPC
2009
Springer
13 years 7 months ago
2009
Springer
In many-core architectures, memory blocks are commonly assigned to the banks of a NUCA cache by following a physical mapping. This mapping assigns blocks to cache banks in a round-...
PODC
2003
ACM
14 years 3 months ago
2003
ACM
As the Internet grows in size, it becomes crucial to understand how the speeds of links in the network must improve in order to sustain the pressure of new end-nodes being added e...