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IPPS
2005
IEEE
14 years 1 months ago
Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores
The use of pipelined floating-point arithmetic cores to create high-performance FPGA-based computational kernels has introduced a new class of problems that do not exist when usi...
Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna
MM
2005
ACM
100views Multimedia» more  MM 2005»
14 years 1 months ago
Cooking navi: assistant for daily cooking in kitchen
We are developing a cooking navigation system, which helps even a novice user to cook several recipes in parallel without failure, while improving an advanced user’s skill furth...
Reiko Hamada, Jun Okabe, Ichiro Ide, Shin'ichi Sat...
SAC
2005
ACM
14 years 1 months ago
On unit task linear-nonlinear two-cluster scheduling problem
In parallel and distributed processing, tasks are ordinarily clustered and assigned to different processors or machines before they are scheduled. The assignment of tasks to proc...
Zhichun Xiao, Wing Ning Li, John Jing-Fu Jenq
GCC
2005
Springer
14 years 1 months ago
The Architecture of SIG Computing Environment and Its Application to Image Processing
Spatial Information Grid (SIG) is a project of applying grid technology to share and integrate spatial data resources, information processing resources, equipment resources, and kn...
Chunhui Yang, Deke Guo, Yan Ren, Xueshan Luo, Jinf...
PVM
2005
Springer
14 years 1 months ago
Cooperative Write-Behind Data Buffering for MPI I/O
Many large-scale production parallel programs often run for a very long time and require data checkpoint periodically to save the state of the computation for program restart and/o...
Wei-keng Liao, Kenin Coloma, Alok N. Choudhary, Le...