356 search results - page 14 / 72 » Parallelizing time with polynomial circuits |
STOC
1998
ACM
14 years 4 days ago
1998
ACM
We study integrated prefetching and caching problems following the work of Cao et. al. [3] and Kimbrel and Karlin [13]. Cao et. al. and Kimbrel and Karlin gave approximation algor...
IPPS
2002
IEEE
14 years 25 days ago
2002
IEEE
Hydra is a computer hardware description language that integrates several kinds of software tool (simulation, netlist generation and timing analysis) within a single circuit speci...
IPPS
2000
IEEE
14 years 9 days ago
2000
IEEE
JRoute is a set of Java classes that provide an application programming interface (API) for routing of Xilinx FPGA devices. The interface allows various levels of control from conn...
TOCL
2008
13 years 7 months ago
2008
State Machines Capture Parallel Algorithms: Correction and Extension ANDREAS BLASS University of Michigan and YURI GUREVICH Microsoft Research We consider parallel algorithms worki...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents an efficient modeling scheme and a partitioning heuristic for parallelizing VLSI post-placement timing optimization. Encoding the paths with timing violations...