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» Parameterized Memory Models and Concurrent Separation Logic
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LCTRTS
2010
Springer
13 years 5 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla
ESOP
2010
Springer
14 years 5 months ago
Faulty Logic: Reasoning about Fault Tolerant Programs
Transient faults are single-shot hardware errors caused by high energy particles from space, manufacturing defects, overheating, and other sources. Such faults can be devastating f...
Matthew L. Meola and David Walker
TPHOL
2009
IEEE
14 years 2 months ago
A Formalisation of Smallfoot in HOL
In this paper a general framework for separation logic inside the HOL theorem prover is presented. This framework is based on Abeparation Logic. It contains a model of an abstract,...
Thomas Tuerk
SEFM
2009
IEEE
14 years 2 months ago
Specifying Interacting Components with Coordinated Concurrent Scenarios
Abstract. We introduce a visual notation for local specification of concurrent components based on message sequence charts (MSCs). Each component is a finite-state machine whose ...
Prakash Chandrasekaran, Madhavan Mukund
TACAS
2007
Springer
105views Algorithms» more  TACAS 2007»
14 years 1 months ago
Hoare Logic for Realistically Modelled Machine Code
This paper presents a mechanised Hoare-style programming logic framework for assembly level programs. The framework has been designed to fit on top of operational semantics of rea...
Magnus O. Myreen, Michael J. C. Gordon