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» Partitioning of VLSI Circuits and Systems
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GLVLSI
2003
IEEE
145views VLSI» more  GLVLSI 2003»
14 years 3 months ago
Using dynamic domino circuits in self-timed systems
We introduce a simple hierarchical design technique for using dynamic domino circuits to build high-performance self-timed data path circuits. We wrap the dynamic domino circuit i...
Jung-Lin Yang, Erik Brunvand
GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
14 years 2 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Cheng-Kok Koh, Patrick H. Madden
ICES
2001
Springer
136views Hardware» more  ICES 2001»
14 years 2 months ago
Initial Studies of a New VLSI Field Programmable Transistor Array
A system for intrinsic hardware evolution of analog electronic circuits is presented. It consists of a VLSI chip featuring 16 × 16 programmable transistor cells, an FPGA based PCI...
Jörg Langeheine, Joachim Becker, Simon Fö...
NIPS
2003
13 years 11 months ago
A Low-Power Analog VLSI Visual Collision Detector
We have designed and tested a single-chip analog VLSI sensor that detects imminent collisions by measuring radially expansive optic flow. The design of the chip is based on a mode...
Reid R. Harrison
DFT
1997
IEEE
93views VLSI» more  DFT 1997»
14 years 2 months ago
An IDDQ Sensor for Concurrent Timing Error Detection
Abstract— Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system o...
Christopher G. Knight, Adit D. Singh, Victor P. Ne...