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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 4 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
ISSRE
2002
IEEE
14 years 19 days ago
A Case Study Using the Round-Trip Strategy for State-Based Class Testing
A number of strategies have been proposed for state-based class testing. An important proposal was made by Chow [5] and adapted by Binder [3]: It consists in deriving test sequenc...
Giuliano Antoniol, Lionel C. Briand, Massimiliano ...
NOSSDAV
2001
Springer
14 years 5 days ago
Network support for mobile multimedia using a self-adaptive distributed proxy
Recent advancements in video and audio codec technologies (e.g., RealVideo [18]) make multimedia streaming possible across a wide range of network conditions. With an increasing t...
Zhuoqing Morley Mao, Hoi-sheung Wilson So, Byungho...
CISS
2007
IEEE
14 years 2 months ago
Detecting Information Flows: Improving Chaff Tolerance by Joint Detection
— The problem of detecting encrypted information flows using timing information is considered. An information flow consists of both information-carrying packets and irrelevant ...
Ting He, Lang Tong
SIGCOMM
2000
ACM
14 years 2 days ago
Measuring link bandwidths using a deterministic model of packet delay
We describe a deterministic model of packet delay and use it to derive both the packet pair [2] property of FIFO-queueing networks and a new technique (packet tailgating) for acti...
Kevin Lai, Mary Baker