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VLSISP
1998
128views more  VLSISP 1998»
15 years 3 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian
IPPS
2003
IEEE
15 years 9 months ago
Modeling Parallel Applications Performance on Heterogeneous Systems
The current technologies have made it possible to execute parallel applications across heterogeneous platforms. However, the performance models available do not provide adequate m...
Jameela Al-Jaroodi, Nader Mohamed, Hong Jiang, Dav...
AINA
2007
IEEE
15 years 10 months ago
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...
Antonio Flores, Juan L. Aragón, Manuel E. A...
ICIP
2007
IEEE
16 years 5 months ago
Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1
Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for ove...
Yen-Lin Lee, Truong Nguyen
129
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IWPC
2002
IEEE
15 years 8 months ago
Architecture Recovery of Dynamically Linked Applications: A Case Study
Most previously published case studies in architecture recovery have been performed on statically linked software systems. Due to the increase in use of middleware technologies, s...
Igor Ivkovic, Michael W. Godfrey