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JSSPP
2004
Springer
14 years 1 months ago
Reconfigurable Gang Scheduling Algorithm
 Using a single traditional gang scheduling algorithm cannot provide the best performance for all workloads and parallel architectures. A solution for this problem is the use of...
Luís Fabrício Wanderley Góes,...
TVLSI
2008
108views more  TVLSI 2008»
13 years 8 months ago
Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel
To satisfy the advanced forward-error-correction (FEC) standards, in which the Convolutional code and Turbo code may co-exit, a prototype design of a unified Convolutional/Turbo de...
Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 2 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
NOSSDAV
2009
Springer
14 years 2 months ago
Web 2.0 traffic measurement: analysis on online map applications
In recent years, web based online map applications have been getting more and more popular, such as Google Maps, Yahoo Maps. Many new Web 2.0 techniques such as mash-up and AJAX w...
Song Lin, Zhiguo Gao, Ke Xu
INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 8 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...