: We address the pose mismatch problem which can occur in face verification systems that have only a single (frontal) face image available for training. In the framework of a Bayes...
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...
The innovations and improvements in digital imaging sensors and scanners, computer modeling, haptic equipments and e-learning technology, as well as the availability of many powerf...
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
act Interpretation C. BERNARDESCHI, N. DE FRANCESCO, G. LETTIERI, L. MARTINI, and P. MASCI Universit`a di Pisa Bytecode verification is a key point in the security chain of the Jav...
Cinzia Bernardeschi, Nicoletta De Francesco, Giuse...