472 search results - page 57 / 95 » Performance Evaluation of Memory Caches in Multiprocessors |
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
Deep-submicron designs have to take care of process variation effects as variations in critical process parameters result in large variations in access latencies of hardware compo...
IEEEPACT
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
PARLE
1994
14 years 25 days ago
1994
Abstract. As the disparity between processor and memory speed continues to widen, the exploitation of locality of reference in shared-memory multiprocessors becomes an increasingly...
ICPP
2003
IEEE
14 years 2 months ago
2003
IEEE
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...
EMSOFT
2009
Springer
14 years 3 months ago
2009
Springer
In this paper, we propose a formal analysis approach to estimate the expected (average) data cache access time of an application across all possible program inputs. Towards this g...