472 search results - page 71 / 95 » Performance Evaluation of Memory Caches in Multiprocessors |
SBACPAD
2008
IEEE
14 years 3 months ago
2008
IEEE
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
ACSAC
2008
IEEE
14 years 3 months ago
2008
IEEE
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
VLDB
2007
ACM
14 years 9 months ago
2007
ACM
We investigate the problem of how to evaluate efficiently a collection of shortest path queries on massive graphs that are too big to fit in the main memory. To evaluate a shortes...
ICS
2003
Tsinghua U.
14 years 1 months ago
2003
Tsinghua U.
Recent work in low-latency, high-bandwidth communication systems has resulted in building user–level Network InControllers (NICs) and communication abstractions that support dir...
IPPS
2007
IEEE
14 years 3 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...