481 search results - page 51 / 97 » Performance Modeling and Measurement of Parallelized Code fo... |
HPDC
2000
IEEE
14 years 1 months ago
2000
IEEE
In this paper we present a scalable protocol for conducting periodic probes of network performance in a way that minimizes collisions between separate probes. The goal of the prot...
ISHPC
1999
Springer
14 years 1 months ago
1999
Springer
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
IPPS
2005
IEEE
14 years 2 months ago
2005
IEEE
With the latest high-end computing nodes combining shared-memory multiprocessing with hardware multithreading, new scheduling policies are necessary for workloads consisting of mu...
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
HIPC
2009
Springer
13 years 6 months ago
2009
Springer
The significant growth in computational power of modern Graphics Processing Units(GPUs) coupled with the advent of general purpose programming environments like NVIDA's CUDA,...