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SPAA
2006
ACM
14 years 2 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
HIPC
2009
Springer
13 years 6 months ago
Impact of early abort mechanisms on lock-based software transactional memory
Software transactional memory (STM) is an emerging concurrency control mechanism for shared memory accesses. Early abort is one of the important techniques to improve the executio...
Zhengyu He, Bo Hong
PVM
1997
Springer
14 years 28 days ago
Embedding SCI into PVM
The extremely low latencies and high bandwidth results achievable with the Scalable Coherent Interface SCI at lowest level encourages its integration into existing Message Passin...
Markus Fischer, Jens Simon
HPDC
2009
IEEE
14 years 3 months ago
Interconnect agnostic checkpoint/restart in open MPI
Long running High Performance Computing (HPC) applications at scale must be able to tolerate inevitable faults if they are to harness current and future HPC systems. Message Passi...
Joshua Hursey, Timothy Mattox, Andrew Lumsdaine
HIPC
2000
Springer
14 years 11 days ago
Experiments with the CHIME Parallel Processing System
: This paper presents the results from running five experiments with the Chime Parallel Processing System. The Chime System is an implementation of the CC++ programming language (p...
Anjaneya R. Chagam, Partha Dasgupta, Rajkumar Khan...