Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...
David J. Kolson, Alexandru Nicolau, Nikil D. Dutt,...
The actor model has already proven itself as an interesting concurrency model that avoids issues such as deadlocks and race conditions by construction, and thus facilitates concur...
The Java programming language and environment is stimulating new research activities in many areas of computing, not the least of which is parallel computing. Parallel techniques ...
We present an algorithm to solve the GROUP MUTUAL EXCLUSION problem in the cache-coherent (CC) model. For the same problem in the distributed shared memory (DSM) model, Danek and ...
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distrib...
Satish Chandra, James R. Larus, Michael Dahlin, Br...