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IPPS
1996
IEEE
13 years 11 months ago
A Method for Register Allocation to Loops in Multiple Register File Architectures
Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...
David J. Kolson, Alexandru Nicolau, Nikil D. Dutt,...
PPOPP
2012
ACM
12 years 3 months ago
Synchronization views for event-loop actors
The actor model has already proven itself as an interesting concurrency model that avoids issues such as deadlocks and race conditions by construction, and thus facilitates concur...
Joeri De Koster, Stefan Marr, Theo D'Hondt
HPCN
2000
Springer
13 years 11 months ago
A Java-Based Parallel Programming Support Environment
The Java programming language and environment is stimulating new research activities in many areas of computing, not the least of which is parallel computing. Parallel techniques ...
Kenneth A. Hawick, Heath A. James
PODC
2010
ACM
13 years 11 months ago
Group mutual exclusion in O(log n) RMR
We present an algorithm to solve the GROUP MUTUAL EXCLUSION problem in the cache-coherent (CC) model. For the same problem in the distributed shared memory (DSM) model, Danek and ...
Vibhor Bhatt, Chien-Chung Huang
DSL
1997
13 years 9 months ago
Experience with a Language for Writing Coherence Protocols
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distrib...
Satish Chandra, James R. Larus, Michael Dahlin, Br...