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136
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ACSD
2006
IEEE
15 years 6 months ago
2006
IEEE
Networks on chip platforms offer the opportunity to introduce a new abstraction level that defines a set of platform services with performance and power characteristics. By making...
148
Voted
DAC
2005
ACM
15 years 6 months ago
2005
ACM
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
131
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IPPS
2003
IEEE
15 years 10 months ago
2003
IEEE
The current technologies have made it possible to execute parallel applications across heterogeneous platforms. However, the performance models available do not provide adequate m...
123
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HIPS
1998
IEEE
15 years 9 months ago
1998
IEEE
ZPL is a parallel array language designed for high performance scientific and engineering computations. Unlike other parallel languages, ZPL is founded on a machine he CTA) that a...
143
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SAC
2010
ACM
15 years 11 months ago
2010
ACM
In this paper, we discuss several facets of optimization in cloud computing, the corresponding challenges and propose an architecture for addressing those challenges. We consider ...