Sciweavers

5564 search results - page 11 / 1113
» Performance Modeling of HPC Applications
Sort
View
PPOPP
2009
ACM
14 years 8 months ago
Parallelization spectroscopy: analysis of thread-level parallelism in hpc programs
In this paper, we present a thorough analysis of thread-level parallelism available in production High Performance Computing (HPC) codes. We survey a number of techniques that are...
Arun Kejariwal, Calin Cascaval
ICS
2009
Tsinghua U.
14 years 2 months ago
/scratch as a cache: rethinking HPC center scratch storage
To sustain emerging data-intensive scientific applications, High Performance Computing (HPC) centers invest a notable fraction of their operating budget on a specialized fast sto...
Henry M. Monti, Ali Raza Butt, Sudharshan S. Vazhk...
ISCA
2012
IEEE
280views Hardware» more  ISCA 2012»
11 years 10 months ago
A case for random shortcut topologies for HPC interconnects
—As the scales of parallel applications and platforms increase the negative impact of communication latencies on performance becomes large. Fortunately, modern High Performance C...
Michihiro Koibuchi, Hiroki Matsutani, Hideharu Ama...
IPPS
2006
IEEE
14 years 1 months ago
Towards building a highly-available cluster based model for high performance computing
In recent years, we have witnessed a growing interest in high performance computing (HPC) using a cluster of workstations. However, many challenges remain to be resolved before th...
Azzedine Boukerche, Raed Al-Shaikh, Mirela Sechi M...
ARC
2010
Springer
183views Hardware» more  ARC 2010»
13 years 7 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards