3567 search results - page 604 / 714 » Performance Prediction and Its Use in Parallel and Distribut... |
133
Voted
IEEEPACT
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
155
Voted
IPPS
2010
IEEE
15 years 21 days ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
155
Voted
CCGRID
2005
IEEE
15 years 8 months ago
2005
IEEE
In this article we present the design choices and the evaluation of a batch scheduler for large clusters, named OAR. This batch scheduler is based upon an original design that emp...
136
Voted
SAC
2006
ACM
15 years 8 months ago
2006
ACM
In a recent work, we have shown that it is not possible to dependably build any type of distributed f fault or intrusiontolerant system under the asynchronous model. This result f...
117
Voted
HOTI
2005
IEEE
15 years 8 months ago
2005
IEEE
Modern routers and switch fabrics can have hundreds of input and output ports running at up to 10 Gb/s; 40 Gb/s systems are starting to appear. At these rates, the performance of ...