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ICNP
1998
IEEE
14 years 8 days ago
Distributed Packet Rewriting and its Application to Scalable Server Architectures
To construct high performance Web servers, system builders are increasingly turning to distributed designs. An important challenge that arises in such designs is the need to direc...
Azer Bestavros, Mark Crovella, Jun Liu, David Mart...
PPOPP
2006
ACM
14 years 2 months ago
Predicting bounds on queuing delay for batch-scheduled parallel machines
Most space-sharing parallel computers presently operated by high-performance computing centers use batch-queuing systems to manage processor allocation. In many cases, users wishi...
John Brevik, Daniel Nurmi, Richard Wolski
ICS
2011
Tsinghua U.
12 years 11 months ago
Predictive coordination of multiple on-chip resources for chip multiprocessors
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
Jian Chen, Lizy Kurian John
ICPP
2006
IEEE
14 years 2 months ago
A Framework to Achieve Guaranteed QoS for Applications and High System Performance in Multi-Institutional Grid Computing
Providing QoS guarantees to the applications in a multi-institutional Grid is a challenging task. Although advance reservations (ARs) can provide QoS guarantees for the applicatio...
Umar Farooq, Shikharesh Majumdar, Eric W. Parsons
EUROPAR
1997
Springer
14 years 5 days ago
Prefetching and Multithreading Performance in Bus-Based Multiprocessors with Petri Nets
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
Edward D. Moreno, Sergio Takeo Kofuji, Marcelo H. ...