1370 search results - page 78 / 274 » Performance analysis and optimization of latency insensitive... |
127
click to vote
DLOG
2000
15 years 5 months ago
2000
In this contribution we present an empirical analysis of the performance of the ALCNHR+ description logic system RACE applied to TBoxes with a very large number of primitive conce...
186
Voted
HIPEAC
2011
Springer
14 years 3 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
JCP
2007
15 years 3 months ago
2007
— Presented in this paper is a joint algorithm optimization and architecture design framework for analysis of repetitive regularities. Two closely coupled algorithm optimization ...
107
click to vote
FMCAD
2007
Springer
15 years 10 months ago
2007
Springer
—Embedded systems typically consist of a composition of a set of hardware and software IP modules. Each module is heavily optimized by itself. However, when these modules are com...
130
Voted
AAAI
1994
15 years 5 months ago
1994
This article shows how rational analysis can be used to minimize learning cost for a general class of statistical learning problems. We discuss the factors that influence learning...