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» Performance analysis of a user-level memory server
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IEEEPACT
2005
IEEE
14 years 1 months ago
HUNTing the Overlap
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
Costin Iancu, Parry Husbands, Paul Hargrove
ICS
2007
Tsinghua U.
14 years 1 months ago
Sensitivity analysis for automatic parallelization on multi-cores
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
Silvius Rus, Maikel Pennings, Lawrence Rauchwerger
CONEXT
2009
ACM
13 years 8 months ago
BUFFALO: bloom filter forwarding architecture for large organizations
In enterprise and data center networks, the scalability of the data plane becomes increasingly challenging as forwarding tables and link speeds grow. Simply building switches with...
Minlan Yu, Alex Fabrikant, Jennifer Rexford
IEEEARES
2009
IEEE
14 years 2 months ago
Capturing Information Flow with Concatenated Dynamic Taint Analysis
Dynamic taint analysis (DTA) is a technique used for tracking information flow by propagating taint propagation across memory locations during program execution. Most implementat...
Hyung Chan Kim, Angelos D. Keromytis, Michael Covi...
IPPS
2007
IEEE
14 years 1 months ago
Experimental Evaluation of Emerging Multi-core Architectures
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...
Abdullah Kayi, Yiyi Yao, Tarek A. El-Ghazawi, Greg...