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IPPS
2005
IEEE
14 years 1 months ago
Runtime Empirical Selection of Loop Schedulers on Hyperthreaded SMPs
Hyperthreaded (HT) and simultaneous multithreaded (SMT) processors are now available in commodity workstations and servers. This technology is designed to increase throughput by e...
Yun Zhang, Michael Voss
IPPS
1998
IEEE
13 years 12 months ago
Pin-Down Cache: A Virtual Memory Management Technique for Zero-Copy Communication
The overhead of copying data through the central processor by a message passing protocol limits data transfer bandwidth. If the network interface directly transfers the user'...
Hiroshi Tezuka, Francis O'Carroll, Atsushi Hori, Y...
HPDC
1999
IEEE
13 years 12 months ago
Overview of a Performance Evaluation System for Global Computing Scheduling Algorithms
While there have been several proposals of high performance global computing systems, scheduling schemes for the systems have not been well investigated. The reason is difficultie...
Atsuko Takefusa, Satoshi Matsuoka, Hidemoto Nakada...
TPDS
2008
89views more  TPDS 2008»
13 years 7 months ago
Power/Performance/Thermal Design-Space Exploration for Multicore Architectures
Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern app...
Matteo Monchiero, Ramon Canal, Antonio Gonzá...
CLUSTER
2009
IEEE
14 years 2 months ago
Reducing network contention with mixed workloads on modern multicore, clusters
Abstract—Multi-core systems are now extremely common in modern clusters. In the past commodity systems may have had up to two or four CPUs per compute node. In modern clusters, t...
Matthew J. Koop, Miao Luo, Dhabaleswar K. Panda