92 search results - page 17 / 19 » Performance debugging shared memory multiprocessor programs ... |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
APPINF
2003
13 years 8 months ago
2003
Whenever large homogeneous data structures need to be processed in a non-trivial way, e.g. in computational sciences, image processing, or system simulation, high-level array prog...
ICFP
2007
ACM
14 years 7 months ago
2007
ACM
In this paper we present an automated way of using spare CPU resources within a shared memory multi-processor or multi-core machine. Our approach is (i) to profile the execution o...
CONCURRENCY
1998
13 years 7 months ago
1998
This paper presents our experience developing applications in Jade, a portable, implicitly parallel programming language designed for exploiting task-level concurrency. Jade progr...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...