121 search results - page 15 / 25 » Performance evaluation for system-on-chip architectures usin... |
DSRT
2004
IEEE
13 years 11 months ago
2004
IEEE
Distributed simulation cloning technology is designed to analyze alternative scenarios of a distributed simulation concurrently within the same execution session. The goal is to o...
CASES
2005
ACM
13 years 9 months ago
2005
ACM
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
JOIN
2007
13 years 7 months ago
2007
In this paper, we show that universal routing can be achieved with low overhead in distributed networks. The validity of our results rests on a new network called the fat-stack. W...
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
ICDE
2010
IEEE
13 years 7 months ago
2010
IEEE
A way to optimize performance of relational row store databases is to reduce the row widths by vertically partitioning tables into table fractions in order to minimize the number ...