121 search results - page 20 / 25 » Performance evaluation for system-on-chip architectures usin... |
FTCS
1993
13 years 9 months ago
1993
This paper describes and evaluates two algorithms for performing on-line failure recovery (data reconstruction) in redundant disk arrays. It presents an implementation of disk-ori...
FLAIRS
2004
13 years 9 months ago
2004
The necessity for improved players and opponents in firstperson entertainment-based real-time artificial environments has inspired our research into artificial game players. We em...
CF
2006
ACM
13 years 11 months ago
2006
ACM
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
We characterize the performance and power attributes of the conjugate gradient (CG) sparse solver which is widely used in scientific applications. We use cycle-accurate simulatio...
INFOCOM
1992
IEEE
13 years 11 months ago
1992
IEEE
The current Internet is based on a stateless (datagram) architecture. However, many recent proposals rely on the maintenance of state information within network routers, leading t...