174 search results - page 12 / 35 » Performance models for hierarchical grid architectures |
FGCS
2007
13 years 7 months ago
2007
In this paper we present CAMELotGrid, a tool to manage Grid computations of Cellular Automata that support the efficient simulation of complex systems modeled by a very large numb...
SPAA
2006
ACM
14 years 1 months ago
2006
ACM
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
IFIP
1999
Springer
13 years 12 months ago
1999
Springer
Most control systems of flexible production cells have a hierarchical structure. They become very complicated and difficult to maintain and modify when the underlying production c...