955 search results - page 38 / 191 » Performance optimization of multiple memory architectures fo... |
CODES
2008
IEEE
13 years 10 months ago
2008
IEEE
Memory subsystems have been considered as one of the most critical components in embedded systems and furthermore, displaying increasing complexity as application requirements div...
DAC
2000
ACM
14 years 10 months ago
2000
ACM
Continuous scaling of VLSI circuits is reducing gate delays but rapidly increasing interconnect delays. Semiconductor Industry Association (SIA) roadmap predicts that, beyond the ...
ICMCS
2006
IEEE
14 years 3 months ago
2006
IEEE
In this paper, a high-level optimization methodology is applied for the implementation of the well-known Convolutional Face Finder (CFF) algorithm for real-time applications on ce...
IJDSN
2007
13 years 9 months ago
2007
We propose to develop wireless Sensor Networks with Mobile Sinks (MSSN), under high sensor node density, where multiple sensor nodes need to share one single communication channel...
IPPS
1998
IEEE
14 years 1 months ago
1998
IEEE
This paper presents reduction recognition and parallel code generationstrategies for distributed-memorymultiprocessors. We describe techniques to recognize a broad range of implic...