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RTSS
2006
IEEE
14 years 3 months ago
Optimal Dimensioning of a Constant Bandwidth Server
The Constant Bandwidth Server (CBS) is an effective scheduling technique frequently used to handle overruns and implement resource reservation in real-time systems where tasks hav...
Giorgio C. Buttazzo, Enrico Bini
EUROMICRO
1999
IEEE
14 years 1 months ago
Delft-Java Dynamic Translation
This paper describes the DELFT-JAVA processor and the mechanisms required to dynamically translate JVM instructions into DELFT-JAVA instructions. Using a form of hardware register...
C. John Glossner, Stamatis Vassiliadis
EUROSYS
2011
ACM
13 years 1 months ago
SRM-buffer: an OS buffer management technique to prevent last level cache from thrashing in multicores
Buffer caches in operating systems keep active file blocks in memory to reduce disk accesses. Related studies have been focused on how to minimize buffer misses and the caused pe...
Xiaoning Ding, Kaibo Wang, Xiaodong Zhang
ICS
1999
Tsinghua U.
14 years 1 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
ISCAS
2008
IEEE
109views Hardware» more  ISCAS 2008»
14 years 4 months ago
A low-area interconnect architecture for chip multiprocessors
— A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost and flexible routing capability. To achieve a low area cost, th...
Zhiyi Yu, Bevan M. Baas