Sciweavers

101 search results - page 11 / 21
» Performing work with asynchronous processors: message-delay-...
Sort
View
ASPLOS
2011
ACM
12 years 11 months ago
Hardware acceleration of transactional memory on commodity systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan...
CODES
2008
IEEE
14 years 1 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
SOCA
2010
IEEE
13 years 5 months ago
Weighted fair share scheduling for loosely controlled concurrent event systems
In asynchronous event systems, the production of an event is decoupled from its consumption via an event queue. The loose coupling of such systems allows great flexibility as to ...
Sean Rooney, Luis Garcés-Erice, Kristijan D...
SIROCCO
2000
13 years 8 months ago
Cooperative computing with fragmentable and mergeable groups
ABSTRACT: This work considers the problem of performing a set of N tasks on a set of P cooperating message-passing processors (P N). The processors use a group communication servi...
Chryssis Georgiou, Alexander A. Shvartsman
TON
1998
186views more  TON 1998»
13 years 7 months ago
Virtual path control for ATM networks with call level quality of service guarantees
— The configuration of virtual path (VP) connection services is expected to play an important role in the operation of large-scale asynchronous transfer mode (ATM) networks. A m...
Nikolaos Anerousis, Aurel A. Lazar