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FOCS
2008
IEEE
14 years 1 months ago
Network Extractor Protocols
We design efficient protocols for processors to extract private randomness over a network with Byzantine faults, when each processor has access to an independent weakly-random n-...
Yael Tauman Kalai, Xin Li, Anup Rao, David Zuckerm...
RTSS
2006
IEEE
14 years 1 months ago
Tightening the Bounds on Feasible Preemption Points
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
RTAS
2006
IEEE
14 years 1 months ago
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
IPPS
2009
IEEE
14 years 2 months ago
CellMR: A framework for supporting mapreduce on asymmetric cell-based clusters
The use of asymmetric multi-core processors with onchip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise...
M. Mustafa Rafique, Benjamin Rose, Ali Raza Butt, ...
NCA
2007
IEEE
14 years 1 months ago
Improving Network Processing Concurrency using TCPServers
Exponentially growing bandwidth requirements and slowing gains in processor speeds have led to the popularity of multiprocessor architectures. Network stack parallelism is increas...
Aniruddha Bohra, Liviu Iftode