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ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
14 years 17 days ago
SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery
We develop an availability solution, called SafetyNet, that uses a unified, lightweight checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At...
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, ...
ICPP
2009
IEEE
13 years 5 months ago
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
Mondrian Nüssle, Martin Scherer, Ulrich Br&uu...
HASKELL
2009
ACM
14 years 2 months ago
A compositional theory for STM Haskell
We address the problem of reasoning about Haskell programs that use Software Transactional Memory (STM). As a motivating example, we consider Haskell code for a concurrent non-det...
Johannes Borgström, Karthikeyan Bhargavan, An...
VLDB
2000
ACM
166views Database» more  VLDB 2000»
13 years 11 months ago
High-Performance and Scalability through Application Tier,In-Memory Data Management
TimesTen Performance Software's Front-Tier product is an application-tier data cache that inter-operates with disk-based relational database management systems (RDBMSs) to ac...
JSA
2007
162views more  JSA 2007»
13 years 7 months ago
Exploration of distributed shared memory architectures for NoC-based multiprocessors
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...