120 search results - page 16 / 24 » Physically based simulation of cloth on distributed memory a... |
IPPS
1999
IEEE
14 years 26 days ago
1999
IEEE
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
TII
2010
13 years 3 months ago
2010
Abstract--CPU utilization control has recently been demonstrated to be an effective way of meeting end-to-end deadlines for distributed real-time systems running in unpredictable e...
HPDC
2006
IEEE
14 years 2 months ago
2006
IEEE
Trace-driven simulation is an important technique used in the evaluation of computer architecture innovations. However using it for studying parallel computers and applications is...
ICS
2004
Tsinghua U.
14 years 1 months ago
2004
Tsinghua U.
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
SAS
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...