85 search results - page 8 / 17 » Pipeline Iteration |
INFOCOM
2007
IEEE
14 years 2 months ago
2007
IEEE
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
FAC
2000
13 years 7 months ago
2000
In this paper we present a method of describing microprocessors at different levels of temporal and data abstraction. We consider microprogrammed, pipelined and superscalar proces...
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
VTC
2008
IEEE
14 years 2 months ago
2008
IEEE
—The design of LTE turbo coding chain suitable for flexible parallel and pipelined hardware implementations is presented. The hierarchical data structure further offers an opport...
IJHPCA
2010
13 years 6 months ago
2010
Sparse matrix operations achieve only small fractions of peak CPU speeds because of the use of specialized, indexbased matrix representations, which degrade cache utilization by i...