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» Planning with Reduced Operator Sets
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155
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IPCCC
2006
IEEE
15 years 10 months ago
OS-aware tuning: improving instruction cache energy efficiency on system workloads
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
Tao Li, Lizy K. John
171
Voted
HICSS
1999
IEEE
193views Biometrics» more  HICSS 1999»
15 years 9 months ago
Web-based Access to Distributed High-Performance Geographic Information Systems for Decision Support
A number of applications that use GIS for decision support can potentially be enhanced by the use of high-performance computers, broadband networks and mass data stores. We descri...
Paul D. Coddington, Kenneth A. Hawick, Heath A. Ja...
144
Voted
ADAEUROPE
2003
Springer
15 years 10 months ago
Charles: A Data Structure Library for Ada95
ontainer. In particular, an iterator abstracts away differences in specific container types, allowing you to view the collection simply as a sequence of items. A generic algorith...
Matthew Heaney
USENIX
2007
15 years 7 months ago
Load Shedding in Network Monitoring Applications
Monitoring and mining real-time network data streams is crucial for managing and operating data networks. The information that network operators desire to extract from the network...
Pere Barlet-Ros, Gianluca Iannaccone, Josep Sanju&...
152
Voted
ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
15 years 6 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy