Sciweavers

462 search results - page 11 / 93
» Power Efficient Data Cache Designs
Sort
View
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 2 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
ASPDAC
1998
ACM
160views Hardware» more  ASPDAC 1998»
13 years 11 months ago
Synthesis of Power Efficient Systems-on-Silicon
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...
Darko Kirovski, Chunho Lee, Miodrag Potkonjak, Wil...
IEEEPACT
2009
IEEE
14 years 2 months ago
DDCache: Decoupled and Delegable Cache Data and Metadata
Abstract—In order to harness the full compute power of manycore processors, future designs must focus on effective utilization of on-chip cache and bandwidth resources. In this p...
Hemayet Hossain, Sandhya Dwarkadas, Michael C. Hua...
ISLPED
2006
ACM
109views Hardware» more  ISLPED 2006»
14 years 1 months ago
Power reduction of multiple disks using dynamic cache resizing and speed control
This paper presents an energy-conservation method for multiple disks and their cache memory. Our method periodically resizes the cache memory and controls the rotation speeds unde...
Le Cai, Yung-Hsiang Lu
CF
2010
ACM
13 years 7 months ago
Efficient cache design for solid-state drives
Solid-State Drives (SSDs) are data storage devices that use solid-state memory to store persistent data. Flash memory is the de facto nonvolatile technology used in most SSDs. It ...
Miaoqing Huang, Olivier Serres, Vikram K. Narayana...