734 search results - page 11 / 147 » Power balanced pipelines |
HPCA
1996
IEEE
14 years 22 days ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
INFOCOM
2003
IEEE
14 years 1 months ago
2003
IEEE
— Pipelined ASIC architectures are increasingly being used in forwarding engines for high speed IP routers. We explore optimization issues in the design of memory-efficient data...
EMSOFT
2004
Springer
14 years 2 months ago
2004
Springer
Basic retiming is an algorithm originally developed for hardware optimization. Software pipelining is a technique proposed to increase instruction-level parallelism for parallel p...
GLOBECOM
2008
IEEE
14 years 3 months ago
2008
IEEE
Abstract—We address the problem of maximizing the minimum signal to interference and noise ratio of individual users via linear precoding in a multiuser downlink channel with mul...
WCNC
2010
IEEE
14 years 11 days ago
2010
IEEE
—When shortest path routing is employed in large scale multi-hop wireless networks, nodes located near the center of the network have to perform disproportional amount of relayin...