734 search results - page 76 / 147 » Power balanced pipelines |
ICMCS
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper proposes a new architecture for efficient variable-length decoding (VLD) of entropy-coded data for multimedia applications on general-purpose processors. It improves o...
CHES
2005
Springer
14 years 2 months ago
2005
Springer
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
ARCS
2004
Springer
14 years 2 months ago
2004
Springer
: Today’s network processor utilize parallel processing in order to cope with the traffic growth and wire-speed of current and future network technologies. In this paper, we stu...
DAC
1997
ACM
14 years 10 days ago
1997
ACM
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...
DAC
1995
ACM
14 years 9 days ago
1995
ACM
- We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...