11 search results - page 1 / 3 » Power- Energy Efficient BIST Schemes for Processor Data Path... |
DT
2000
13 years 10 months ago
2000
CF
2005
ACM
14 years 27 days ago
2005
ACM
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
EUROPAR
2005
Springer
14 years 4 months ago
2005
Springer
A processor’s energy consumption can be reduced by compressing values (data and addresses) that flow through a processor pipeline and gating off portions of data path elements th...
NETWORKING
2004
14 years 9 days ago
2004
We define a transmission power adaptation-based routing technique that finds optimal paths for minimum energy reliable data transfer in multi-hop wireless networks. This optimal ch...
ICPP
2002
IEEE
14 years 3 months ago
2002
IEEE
Power aware computing has become popular recently and many techniques have been proposed to manage the energy consumption for traditional real-time applications. We have previousl...