2 search results - page 1 / 1 » Power-Constrained Hybrid BIST Test Scheduling in an Abort-on... |
DSD
2005
IEEE
14 years 1 months ago
2005
IEEE
1 This paper presents a method for power-constrained system-on-chip test scheduling in an abort-on-first-fail environment where the test is terminated as soon as a fault is detecte...
ATS
2004
IEEE
13 years 11 months ago
2004
IEEE
1 This paper describes a heuristic for system-on-chip test scheduling in an abort-on-fail context, where the test is terminated as soon as a defect is detected. We consider an hybr...